Integration of Li4Ti5O12 crystalline films on silicon towards high-rate performance lithionic devices

In an ever-growing autonomous world, further technological developments within the internet-of-things (IoT) rely on monolithic integration and miniaturization of functional devices on-chip such as microbatteries, memristive neuromorphic architectures, and gas sensors. Solid-state lithionic devices, formed by integrating oxide-based Li-ion conducting thin films on silicon substrates, offer a very promising solution for the aforementioned applications especially when combined with thin film solid electrolytes. The Li-ion migration mechanism within such lithionic devices enables operation over a multitude of applications: (i) for energy storage, especially by employing three dimensional solid-state microbattery architectures to achieve high energy and power capability; (ii) for resistive memory such as two-terminal or three-terminal memristive devices, where fast and low-energy operation (i.e. nonvolatile resistant switching) can be achieved between multilevel analog states; (iii) for electrochemical gas sensing and environmental monitoring/tracking devices, with enhanced stability and selectivity towards gaseous species. Accordingly, the use of Li-containing ceramics offers a path towards on-chip multipurpose (energy and memory) storage and sensing devices. In order to achieve optimal performance of the aforementioned lithionic devices, the grown oxide-based thin films (i.e. Li-ion conductors including solid electrolytes) must exhibit excellent Li-ion conductivity as well as structural, mechanical, and (electro-)chemical stability under applied bias. Moreover, achieving the desired Li stoichiometry, the purest phase, a high degree of crystallinity, and sharp/stable interfaces will facilitate rapid Li-ion transport throughout the bulk and across the interfaces leading to a device with superior rate performance. However, integrating crystalline films of functional Li-based oxides directly onto technologically relevant silicon substrates, which is a standard within the electronics manufacturing industry, remains a challenging task due to the large lattice mismatch between these materials as well as substrate reactivity at elevated deposition temperatures and high oxygen partial pressures. Such unwanted oxygen-containing species formed at the interface between the Si substrate and the Li ceramic compromise the growth quality while building up interfacial resistance, which could reduce overall device performance. In summary, a high quality 90 nm and 50 nm Li4Ti5O12 (LTO) films can be grown on silicon substrates by applying an ultrathin (2 nm) γ-Al2O3 buffer layer. This alumina layer enables crystalline LTO films to be deposited by PLD at low temperature (500 °C) while mitigating the formation of undesirable species such as silicates and SiO2 on the surface of the silicon substrate. From in-depth structural characterization, the PLD process results in columnar growth of LTO(111) bidomains with two grain orientations rotated by 180° along the [111] growth axis. HRTEM and elemental maps confirmed the sharp interfaces between Si/Al2O3 and Al2O3/LTO. The electrochemical performance of the LTO thin films was verified in liquid-based half-cells using the surface-modified γ-Al2O3/Si(111) substrate directly as a current collector. Long-term galvanostatic cycling measurements of 90 nm and 50 nm LTO films were conducted at 3C with 97% capacity retention after 1000 cycles and 100C with 91% capacity retention after 5000 cycles, respectively. A multitude of rate capability tests were performed using different voltage ranges (1.4-1.7 V vs. 1-2.5 V vs. Li+/Li) and special conditions such as 10C lithiation steps while varying the delithiation C-rates up to 5000C. For the latter test, the 50 nm LTO/ Al2O3/Si heterostructure cycled with a charge capacity of 56 mAh g-1 at an extreme rate of 5000C. Additionally, the thin film retained more than 80% of LTO’s theoretical capacity until a C-rate of 350C. Furthermore, to showcase rapid Li-ion (de)intercalation of the LTO thin film, sub-millisecond current pulses (0.2 ms pulse at 1000C or 3 mA cm-2) were successfully applied to the 50 nm LTO/ Al2O3/Si heterostructure, which is promising for resistive memory devices with fast switching timescales. This work highlights the feasibility to integrate oxide-based Li-ion conducting thin films on Si-based chips through interface engineering via a 2 nm alumina buffer layer to promote further developments in solid-state lithionic devices such as microbatteries, memristive memories or gas sensor technologies.